People, use the heading formats (ctrl+1,2,3) for different headings -Sulaiman Abdulazeez 5/25/09 11:12 PM

Intel Processors Addressing Modes

What is an Addressing Mode ?

An addressing mode is basically a way of telling the processor how & where to get data from. So it is necessary to understand the different addressing modes to know what data you are accessing.

Addressing modes are used by the ISA to specify the address of an object that is to be accessed. In processor machines, an addressing mode can specify a constant, a register or a location in memory. They are highly of interest to Assembly programming code writers.

To understand the Intel addressing modes, the registers that are used by the processor need to be known.

32-bit registers

In 1985, 32 bit registers were first released with Intel's 80386 (386) processor.

General Purpose 32-bit Registers

Reg-32

Reg-16

High

Low

Name

EAX

AX

AH

AL

Accumulator

EBX

BX

BH

BL

Base

ECX

CX

CH

CL

Counter

EDX

DX

DH

DL

Data

32-bit Pointer Registers

Reg-32

Reg-16

Name

ESI

SI

Source Index

EDI

DI

Destination Index

EBP

BP

Stack Frame Base Pointer

ESP

SP

Stack Pointer

Segment Registers

Reg

Name

CS

Code Segment

DS

Data Segment

ES

Extra Segment

FS

Extra Segment

GS

Extra Segment

SS

Stack Segment

16-bit registers

General Purpose 16-bit Registers

Reg

High

Low

Name

AX

AH

AL

Accumulator

BX

BH

BL

Base

CX

CH

CL

Counter

DX

DH

DL

Data

16-bit Pointer Registers

Reg

Name

SI

Source Index

DI

Destination Index

BP

Stack Frame Base Pointer

SP

Stack Pointer

Segment Registers

Reg

Name

CS

Code Segment

DS

Data Segment

ES

Extra Segment

SS

Stack Segment

The Main Addressing Modes: The table does not cover all the addressing modes. Also, we do not have a displacement addressing mode.

Also what you caled indexed addressing mode is incorrect. This is based indexed. -Aiman El-Maleh 6/1/09 9:15 AM

Addressing modes

Example Instruction

When used

Register

Add EAX, EBX

When a value is in a register

Immediate

Add EDX, #3

For constants

Based

Add EDX, Array(EAX+4)

Accessing array elements

Indexed

Add EDX, Array(EAX*2)

Accessing array elements

Based-Indexed

Add EAX, (ESP + EDX)

Useful in array addressing:
ESP - base of array
EDX - index amount

Direct

Add EAX, (1001)

Useful in accessing static data

There are three type of operand:
1> Immediate

2
> Register
3>
Memory

After knowing what an addressing mode is, it is time to know how can we do the addressing.

Basically there are many ways to specify the addressing mode for memory operands, which are:

1. Direct : uses the variable name directly to address the data, assembler replaces with offset.

2. Register indirect : saving the offset of the data into a register, and then use brackets[].

3. Indexed : offset[index] , [offset+index], [offset*scale] or [offset+index*scale].

4. Based : [BASE+DISP].

5. Based-indexed : [Base + (Index * Scale) + disp] , in base -index operand we add the values of the two registers (base &index) to get an offset address.

Please try to make the font size and style consistent -Aiman El-Maleh 6/15/09 1:14 AM

Some Examples :
Assume we have an array:

array DWORD 10000h,20000h,30000h,40000h


Also we have a matrix:

matrix DWORD 0, 1, 2, 3, 4 ; 4 rows, 5 cols

DWORD 10,11,12,13,14

DWORD 20,21,22,23,24 DWORD 30,31,32,33,34

1 ) Register Addressing:

mov eax , ecx

2 ) immediate Addressing:

mov eax , 10

3 ) Direct Memory Addressing:

add eax , variable

4 ) Register Indirect Addressing:

mov eax ,[ebx]

EBX contains the address of the operand, not the operand itself

5 ) Indexed Addressing:

mov esi, 0 ; esi = array index

mov eax,array[esi]

6 ) Index Scaling:

mov eax, array[esi*4]

7 ) Based AddressingBased-Indexed Addressing:

mov eax, matrix[ebx+esi*4]



Starting with Register Addressing mode

In short it's like assigning a value into register from a register

i.e.

mov eax,ebx.


Immediate addressing mode assigning a value into register from constant

i.e.

mov eax,5.


In similar manner we can have Direct memory addressing mode

i.e.

mov edx, variable1 where variable1 already declared in .data.


Memory Addressing Mode can be more complicated than that, for example Indirect addressing that can be helpful in manipulating arrays traverse them and so on. We can use that kind of addressing by simply move the offset on any memory element into a register & then use the register as a reference to access the memory, i.e.

mov eax,variable1

SUB ebx,[eax]


16-bit addressing modes

Addressing modes for 16-bit x86 processors can be summarized by the following formula :

Examples:

this table has to be here because it shows some examples on just 16-bit addressing modes -Ashraf Baroum 5/26/09 7:11 PM

Example

Source

Result

mov ax, 1234h

Immediate Constant

Copy an immediate (constant) value to a register. You cannot move immediate values to segment registers.

mov ax, Variable

Absolute Address

Copy the contents of a variable at an absolute address to a register. You can copy from memory to segment registers.

mov ax, bx

Rigester Direct

Copy the contents of one register to another. You can copy between any two registers except segment registers.

mov ax, [bx]

Register Indirect

Copy from the near address pointed to by the BX register to AX. In 16-bit programs, as you can see in the above formula you can only use base (BX or BP) or index (SI orDI) registers to address memory.

mov ax, [bx+2]

Base Relative

Copy from an indirect address plus an offset. The memory address is the sum of the register plus the immediate value.

mov ax, [si+bx]

Based-Indexed

Address calculations can use either base register (BX or BP) plus an index register (SI or DI). You cannot combine two base registers or two index registers

mov ax, [si+bx+2]

Based-Indexed Relative

Copy from memory using a base, index and offset value.



32-bit addressing modes

Addressing modes for 32-bit x86 processors can be summarized by the following formula :



MEMORY ADDRESSING MODES TABLE :

Mode

Description

Assembler Syntax

Absolute Offset

offset

exp

Register Indirect

abase

reg

Register Indirect with Offset

abase+offset

expression(reg)

Register Indirect with Index

abase+(index*scale)

(reg)[reg*scale]

Register Indirect with Index and Displacment

abase+(index*scale)+displacment

exp (reg)[reg*scale]

Index with Displacment

(index*scale)+displacment

exp[reg*scale]

IP with Displacment

IP+displacment+8

exp(IP)


reg = register , exp = expression



Pitfalls:
Examples of valid instructions utilizing addressing modes and also some of invalid instructions with proper justifications.
allowed:
NOT allowed:

even though it is Register addressing mode but it has its own code (ALU needed )-Hamzah Hajar ‏15‏/6‏/2009 1:07 م

Program counter (PC) relative addressing mode:

(Effective PC address = next instruction address + offset, offset may be negative)

PC-relative address is the offset of the target added to the address of the next instruction. This offset is usually signed to allow reference to code both before and after the instruction.

Jumps use PC-relative address a lot, because typical jumps are to nearby instructions (in a high-level language most if or while statements are reasonably short). Most of the cases an 8 or 10 bit offset is large enough.

The run time will be speeded up without changing the instruction operations of existing processors and without requiring new instructions. The target address calculation is made faster by calculating the lower 8-bits of the target address So even the code space it much less.

Another advantage of program-relative addressing is that the code may be position-independent, i.e. it can be loaded anywhere in memory without the need to adjust any addresses.

In the Program counter (PC) relative addressing mode the Assembler Calculates the difference (in bytes), called PC-relative offset, between the offset of the target label and the offset of the following instruction .in the run time the processor will Adds the PC-relative offset to EIP when executing LOOP instruction.



Topic revision: r1 - 02 Dec 2009, EfjnjJnlnj
 
The copyright of the content on this website is held by the contributing authors, except where stated elsewhere. see CopyrightStatement. Creative Commons LicenseGet Foswiki at sourceforge.net. Fast, secure and Free Open Source software downloads